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"A Dual-Clock VLSI Design of H.265 Sample Adaptive Offset Estimation for 8k ..."

Jian-Bin Zhou et al. (2017)

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DOI: 10.1109/TVLSI.2016.2593581

access: closed

type: Journal Article

metadata version: 2020-03-11

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  - journals/tvlsi/ZhouZWZYG17
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  persistent URL:
  - https://dblp.org/rec/journals/tvlsi/ZhouZWZYG17
Jian-Bin Zhou, Dajiang Zhou, Shihao Wang, Shuping Zhang, Takeshi Yoshimura, Satoshi Goto:
A Dual-Clock VLSI Design of H.265 Sample Adaptive Offset Estimation for 8k Ultra-HD TV Encoding. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 714-724 (2017)

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