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"Optimizing FPGA Logic Block Architectures for Arithmetic."
Kevin E. Murray et al. (2020)
- Kevin E. Murray
, Jason Luu, Matthew J. P. Walker, Conor McCullough, Sen Wang, Safeen Huda
, Bo Yan, Charles Chiasson, Kenneth B. Kent
, Jason Helge Anderson, Jonathan Rose, Vaughn Betz
:
Optimizing FPGA Logic Block Architectures for Arithmetic. IEEE Trans. Very Large Scale Integr. Syst. 28(6): 1378-1391 (2020)
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