"A Hardware Accelerator for the Semi-Global Matching Stereo Algorithm: An ..."

John A. Kalomiros, John V. Vourvoulakis, Stavros Vologiannidis (2024)

> Home

Details and statistics

DOI: 10.1145/3615869

access: closed

type: Journal Article

metadata version: 2024-04-15

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/trets/KalomirosVV24
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/trets/KalomirosVV24
John A. Kalomiros, John V. Vourvoulakis, Stavros Vologiannidis:
A Hardware Accelerator for the Semi-Global Matching Stereo Algorithm: An Efficient Implementation for the Stratix V and Zynq UltraScale+ FPGA Technology. ACM Trans. Reconfigurable Technol. Syst. 17(1): 5:1-5:25 (2024)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.