"Clock Skew Minimization in Multi-Voltage Mode Designs Using Adjustable ..."

Yu-Shih Su et al. (2010)

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DOI: 10.1109/TCAD.2010.2061654

access: closed

type: Journal Article

metadata version: 2020-09-24

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Yu-Shih Su, Wing-Kai Hon, Cheng-Chih Yang, Shih-Chieh Chang, Yeong-Jar Chang:
Clock Skew Minimization in Multi-Voltage Mode Designs Using Adjustable Delay Buffers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(12): 1921-1930 (2010)

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