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"Verification and Synthesis of Clock-Gated Circuits."
Yu-Yun Dai, Robert K. Brayton (2019)
- Yu-Yun Dai
, Robert K. Brayton
:
Verification and Synthesis of Clock-Gated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(2): 366-379 (2019)
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