"A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop ..."

Xiaoteng Zhao et al. (2022)

> Home

Details and statistics

DOI: 10.1109/JSSC.2022.3140778

access: closed

type: Journal Article

metadata version: 2022-05-18

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/ZhaoCWMMM22
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/ZhaoCWMMM22
Xiaoteng Zhao, Yong Chen, Lin Wang, Pui-In Mak, Franco Maloberti, Rui Paulo Martins:
A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR With a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS. IEEE J. Solid State Circuits 57(5): 1358-1371 (2022)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.