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"A 1.8-V 700-mb/s/pin 512-mb DDR-II SDRAM with on-die termination and ..."

Changsik Yoo et al. (2004)

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DOI: 10.1109/JSSC.2004.827806

access: closed

type: Journal Article

metadata version: 2022-04-22

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Changsik Yoo, Kye-Hyun Kyung, Kyunam Lim, Hi-Choon Lee, Joon-Wan Chai, Nak-Won Heo, Dong-Jin Lee, Chang-Hyun Kim:
A 1.8-V 700-mb/s/pin 512-mb DDR-II SDRAM with on-die termination and off-chip driver calibration. IEEE J. Solid State Circuits 39(6): 941-951 (2004)

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