"A 10-b 320-MS/s Stage-Gain-Error Self-Calibration Pipeline ADC."

Chien-Jian Tseng et al. (2012)

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DOI: 10.1109/JSSC.2012.2192655

access: closed

type: Journal Article

metadata version: 2020-08-30

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Chien-Jian Tseng, Hung-Wei Chen, Wei-Ting Shen, Wei-Chih Cheng, Hsin-Shu Chen:
A 10-b 320-MS/s Stage-Gain-Error Self-Calibration Pipeline ADC. IEEE J. Solid State Circuits 47(6): 1334-1343 (2012)

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