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ORCID"A 2× 30k-Spin Multi-Chip Scalable CMOS Annealing Processor Based on ..."
Takashi Takemoto et al. (2020)
- Takashi Takemoto
, Masato Hayashi, Chihiro Yoshimura, Masanao Yamaoka:
A 2× 30k-Spin Multi-Chip Scalable CMOS Annealing Processor Based on a Processing-in-Memory Approach for Solving Large-Scale Combinatorial Optimization Problems. IEEE J. Solid State Circuits 55(1): 145-156 (2020)
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