default search action
"A 1.8-nW, -73.5-dB PSRR, 0.2-ms Startup Time, CMOS Voltage Reference With ..."
Cheng-Ze Shao, Shih-Che Kuo, Yu-Te Liao (2021)
- Cheng-Ze Shao, Shih-Che Kuo, Yu-Te Liao:
A 1.8-nW, -73.5-dB PSRR, 0.2-ms Startup Time, CMOS Voltage Reference With Self-Biased Feedback and Capacitively Coupled Schemes. IEEE J. Solid State Circuits 56(6): 1795-1804 (2021)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.