"A 4-nm 1.15 TB/s HBM3 Interface With Resistor-Tuned Offset Calibration and ..."

Kwanyeob Chae et al. (2024)

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DOI: 10.1109/JSSC.2023.3330485

access: closed

type: Journal Article

metadata version: 2024-01-13

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Kwanyeob Chae, Jaegeun Song, Yoonjae Choi, Jiyeon Park, Billy Koo, Jihun Oh, Shinyoung Yi, Won Lee, Dongha Kim, Kyeongkeun Kang, Eunsu Kim, Juyoung Kim, Sanghune Park, Sungcheol Park, Mijung Noh, Hyo-Gyuem Rhew, Jongshin Shin:
A 4-nm 1.15 TB/s HBM3 Interface With Resistor-Tuned Offset Calibration and In Situ Margin Detection. IEEE J. Solid State Circuits 59(1): 231-242 (2024)

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