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"Timing-constrained power minimization in VLSI circuits by simultaneous ..."
Konstantin Moiseev, Shmuel Wimer, Avinoam Kolodny (2015)
- Konstantin Moiseev, Shmuel Wimer, Avinoam Kolodny:
Timing-constrained power minimization in VLSI circuits by simultaneous multilayer wire spacing. Integr. 48: 116-128 (2015)
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