"A Retargetable Simulator Generator for DSP Processor Cores with Packed ..."

Nozomu Togawa et al. (2003)

> Home

Details and statistics

DOI: —

access: closed

type: Journal Article

metadata version: 2021-06-08

- view
  - electronic edition @ ieice.org
- export record
  dblp key:
  - journals/ieiceta/TogawaKMCYO03
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieiceta/TogawaKMCYO03
Nozomu Togawa, Kyosuke Kasahara, Yuichiro Miyaoka, Jinku Choi, Masao Yanagisawa, Tatsuo Ohtsuki:
A Retargetable Simulator Generator for DSP Processor Cores with Packed SIMD-type Instructions. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(12): 3099-3109 (2003)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.