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"Single-Ended Boost-Less (SE-BL) 7T Process Tolerant SRAM Design in ..."

C. B. Kushwah, Santosh Kumar Vishvakarma, Devesh Dwivedi (2016)

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DOI: 10.1007/S00034-015-0086-5

access: closed

type: Journal Article

metadata version: 2020-06-21

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C. B. Kushwah, Santosh Kumar Vishvakarma, Devesh Dwivedi:
Single-Ended Boost-Less (SE-BL) 7T Process Tolerant SRAM Design in Sub-threshold Regime for Ultra-Low-Power Applications. Circuits Syst. Signal Process. 35(2): 385-407 (2016)

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