"Simulation Methodology for Analysis of Substrate Noise Impact on Analog / ..."

Charlotte Soens et al. (2007)

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DOI: —

access: open

type: Informal or Other Publication

metadata version: 2018-08-13

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  - electronic edition @ arxiv.org (open access)
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  dblp key:
  - journals/corr/abs-0710-4723
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  - https://dblp.org/rec/journals/corr/abs-0710-4723
Charlotte Soens, Geert Van der Plas, Piet Wambacq, Stéphane Donnay:
Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance. CoRR abs/0710.4723 (2007)

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