"Design of Parity Preserving Logic Based Fault Tolerant Reversible ..."

Rakshith Saligram et al. (2013)

> Home

Details and statistics

DOI: —

access: open

type: Informal or Other Publication

metadata version: 2018-08-13

- view
  - electronic edition @ arxiv.org (open access)
- export record
  dblp key:
  - journals/corr/SaligramHKBV13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/corr/SaligramHKBV13
Rakshith Saligram, Shrihari Shridhar Hegde, Shashidhar A. Kulkarni, H. R. Bhagyalakshmi, M. K. Venkatesha:
Design of Parity Preserving Logic Based Fault Tolerant Reversible Arithmetic Logic Unit. CoRR abs/1307.3690 (2013)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.