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"Random Pattern Testability Enhancement by Circuit Rewiring."

Shih-Chieh Chang et al. (2001)

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DOI: 10.1155/2001/87048

access: open

type: Journal Article

metadata version: 2023-05-08

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  dblp key:
  - journals/vlsi/ChangCCJD01
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  - https://dblp.org/rec/journals/vlsi/ChangCCJD01
Shih-Chieh Chang, Kwen-Yo Chen, Ching-Hsiang Cheng, Wen-Ben Jone, Sunil R. Das:
Random Pattern Testability Enhancement by Circuit Rewiring. VLSI Design 12(4): 537-549 (2001)

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