"A 40-Gb/s/pin Low-Voltage POD Single-Ended PAM-4 Transceiver with Timing ..."

Hyunsub Norbert Rie et al. (2022)

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DOI: 10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830507

access: closed

type: Conference or Workshop Paper

metadata version: 2022-08-04

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Hyunsub Norbert Rie, Chang Soo Yoon, Jindo Byun, Sucheol Lee, Garam Kim, Joohwan Kim, Junyoung Park, Hyunyoon Cho, Youngdo Um, Hyungmin Jin, Kwangseob Shin, Minsu Jung, Go-Eun Cha, Minjae Lee, YoungMin Kim, Byeori Han, Yuseong Jeon, Jisun Lee, EunSeok Shin, Hyuk-Jun Kwon, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko:
A 40-Gb/s/pin Low-Voltage POD Single-Ended PAM-4 Transceiver with Timing Calibrated Reset-less Slicer and Bidirectional T-Coil for GDDR7 Application. VLSI Technology and Circuits 2022: 148-149

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