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"Timing Verification and Delay Test Generation for Hierarchical Designs."

Arun Krishnamachary, Jacob A. Abraham, Raghuram S. Tupuri (2001)

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DOI: 10.1109/ICVD.2001.902655

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/vlsid/KrishnamacharyAT01
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  persistent URL:
  - https://dblp.org/rec/conf/vlsid/KrishnamacharyAT01
Arun Krishnamachary, Jacob A. Abraham, Raghuram S. Tupuri:
Timing Verification and Delay Test Generation for Hierarchical Designs. VLSI Design 2001: 157-162

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