"PhaseMAC: A 14 TOPS/W 8bit GRO Based Phase Domain MAC Circuit for ..."

Kentaro Yoshioka et al. (2018)

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DOI: 10.1109/VLSIC.2018.8502291

access: closed

type: Conference or Workshop Paper

metadata version: 2022-12-07

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Kentaro Yoshioka, Yosuke Toyama, Koichiro Ban, Daisuke Yashima, Shigeru Maya, Akihide Sai, Kohei Onizuka:
PhaseMAC: A 14 TOPS/W 8bit GRO Based Phase Domain MAC Circuit for in-Sensor-Computed Deep Learning Accelerators. VLSI Circuits 2018: 263-264

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