Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"A Hardware Generator for Posit Arithmetic and its FPGA Prototyping."

Diksha Shekhawat, Apoorva Jangir, Jai Gopal Pandey (2021)

> Home

Details and statistics

DOI: 10.1109/VDAT53777.2021.9601025

access: closed

type: Conference or Workshop Paper

metadata version: 2021-11-19

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vdat/ShekhawatJP21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vdat/ShekhawatJP21
Diksha Shekhawat, Apoorva Jangir, Jai Gopal Pandey:
A Hardware Generator for Posit Arithmetic and its FPGA Prototyping. VDAT 2021: 1-6

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.