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"Pin accessibility evaluating model for improving routability of VLSI designs."
Hong-Yan Su et al. (2017)
- Hong-Yan Su, Shinichi Nishizawa, Yan-Shiun Wu, Jun Shiomi, Yih-Lang Li, Hidetoshi Onodera:
Pin accessibility evaluating model for improving routability of VLSI designs. SoCC 2017: 56-61
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