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"VHDL vs. Bluespec system verilog: a case study on a Java embedded ..."

Flavius Gruian, Mark Westmijze (2008)

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DOI: 10.1145/1363686.1364037

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Flavius Gruian, Mark Westmijze:
VHDL vs. Bluespec system verilog: a case study on a Java embedded architecture. SAC 2008: 1492-1497

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