"12.3 A low-power and high-performance 10nm SRAM architecture for mobile ..."

Michael Clinton et al. (2017)

> Home

Details and statistics

DOI: 10.1109/ISSCC.2017.7870335

access: closed

type: Conference or Workshop Paper

metadata version: 2019-07-10

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/ClintonCLLWYHWY17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/ClintonCLLWYHWY17
Michael Clinton, Hank Cheng, Hung-Jen Liao, Robin Lee, Ching-Wei Wu, Johnny Yang, Hau-Tai Hsieh, Frank Wu, Jung-Ping Yang, Atul Katoch, Arun Achyuthan, Donald Mikan, Bryan Sheffield, Jonathan Chang:
12.3 A low-power and high-performance 10nm SRAM architecture for mobile applications. ISSCC 2017: 210-211

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.