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"A 0.9V, 65nm logic-compatible embedded DRAM with > 1ms data retention ..."

Ki Chul Chun, Pulkit Jain, Chris H. Kim (2009)

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DOI: 10.1145/1594233.1594261

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/islped/ChunJK09
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Ki Chul Chun, Pulkit Jain, Chris H. Kim:
A 0.9V, 65nm logic-compatible embedded DRAM with > 1ms data retention time and 53% less static power than a power-gated SRAM. ISLPED 2009: 119-120

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