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"Scalable counter architecture for a pre-loadable 1 GHz@0.6 um/5V ..."

Andreas Wassatsch, Dirk Timmermann (2001)

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DOI: 10.1109/ISCAS.2001.922178

access: closed

type: Conference or Workshop Paper

metadata version: 2017-06-04

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  - conf/iscas/WassatschT01
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Andreas Wassatsch, Dirk Timmermann:
Scalable counter architecture for a pre-loadable 1 GHz@0.6 um/5V pre-scaler in TSPC. ISCAS (4) 2001: 92-95

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