"Reducing power, area, and delay of threshold logic gates considering ..."

Seyed Nima Mozaffari, Spyros Tragoudas, Themistoklis Haniotakis (2017)

Details and statistics

DOI: 10.1109/ISCAS.2017.8050380

access: closed

type: Conference or Workshop Paper

metadata version: 2017-10-07

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