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"A 65-nm CMOS burst-mode CDR based on a GVCO with symmetric loops."

Keiji Kishine et al. (2014)

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DOI: 10.1109/ISCAS.2014.6865731

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  - conf/iscas/KishineIINTOK14
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  - https://dblp.org/rec/conf/iscas/KishineIINTOK14
Keiji Kishine, Hiroshi Inoue, Hiromi Inaba, Makoto Nakamura, Akira Tsuchiya, Hidetoshi Onodera, Hiroaki Katsurai:
A 65-nm CMOS burst-mode CDR based on a GVCO with symmetric loops. ISCAS 2014: 2704-2707

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