"A pre-emphasis circuit design for high speed on-chip global interconnect."

Jianfei Jiang et al. (2012)

Details and statistics

DOI: 10.1109/ISCAS.2012.6271933

access: closed

type: Conference or Workshop Paper

metadata version: 2022-06-22

a service of  Schloss Dagstuhl - Leibniz Center for Informatics