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"A 0.7 μm CMOS clock recovery circuit for 622 Mb/s SDH systems."

Eduardo de Vasconcelos, Rui L. Aguiar, Dinis M. Santos (1998)

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DOI: 10.1109/ICECS.1998.814019

access: closed

type: Conference or Workshop Paper

metadata version: 2021-08-19

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  dblp key:
  - conf/icecsys/VasconcelosAS98
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  - https://dblp.org/rec/conf/icecsys/VasconcelosAS98
Eduardo de Vasconcelos, Rui L. Aguiar, Dinis M. Santos:
A 0.7 μm CMOS clock recovery circuit for 622 Mb/s SDH systems. ICECS 1998: 411-414

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