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"FPGA-Efficient Hybrid LUT/CORDIC Architecture."

Ireneusz Janiszewski, Hermann Meuth, Bernhard Hoppe (2004)

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DOI: 10.1007/978-3-540-30117-2_102

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Ireneusz Janiszewski, Hermann Meuth, Bernhard Hoppe:
FPGA-Efficient Hybrid LUT/CORDIC Architecture. FPL 2004: 933-937

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