"Mitigating read & write errors in STT-MRAM memories under DVS."

Elena-Ioana Vatajelu et al. (2017)

Details and statistics

DOI: 10.1109/ETS.2017.7968209

access: closed

type: Conference or Workshop Paper

metadata version: 2024-11-08

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.