![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
"Hazard-free Muller Gates for Implementing Asynchronous Circuits on Xilinx ..."
Cuong Pham-Quoc, Anh-Vu Dinh-Duc (2010)
- Cuong Pham-Quoc
, Anh-Vu Dinh-Duc:
Hazard-free Muller Gates for Implementing Asynchronous Circuits on Xilinx FPGA. DELTA 2010: 289-292
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.