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"Dual-loop Digital PLL Design for Adaptive Clock Recovery."

Tae Hun Kim, Beomsup Kim (1998)

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DOI: 10.1109/ASPDAC.1998.669499

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Tae Hun Kim, Beomsup Kim:
Dual-loop Digital PLL Design for Adaptive Clock Recovery. ASP-DAC 1998: 347-352

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