"An improved bit-plane and pass dual parallel architecture for coefficient ..."

Yanju Han, Chao Xu, Yizhen Zhang (2005)

> Home

Details and statistics

DOI: 10.1145/1120725.1121044

access: closed

type: Conference or Workshop Paper

metadata version: 2025-02-14

- view
  authority control:
- export record
  dblp key:
  - conf/aspdac/HanXZ05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/aspdac/HanXZ05
Yanju Han, Chao Xu, Yizhen Zhang:
An improved bit-plane and pass dual parallel architecture for coefficient bit modeling in JPEG2000. ASP-DAC 2005: 1284-1287

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.