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"An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW ..."
Liang-Bi Chen et al. (2009)
- Liang-Bi Chen
, Ruei-Ting Gu, Wei-Sheng Huang, Chien-Chou Wang, Wen-Chi Shiue, Tsung-Yu Ho, Yun-Nan Chang, Shen-Fu Hsiao, Chung-Nan Lee, Ing-Jer Huang:
An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics. ASP-DAC 2009: 131-132
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