BibTeX record journals/tvlsi/KaoWLCCH09

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@article{DBLP:journals/tvlsi/KaoWLCCH09,
  author       = {Min{-}Sheng Kao and
                  Jen{-}Ming Wu and
                  Chih{-}Hsing Lin and
                  Fanta Chen and
                  Ching{-}Te Chiu and
                  Shawn S. H. Hsu},
  title        = {A 10-Gb/s {CML} {I/O} Circuit for Backplane Interconnection in 0.18-{\(\mathrm{\mu}\)}m
                  {CMOS} Technology},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {17},
  number       = {5},
  pages        = {688--696},
  year         = {2009},
  url          = {https://doi.org/10.1109/TVLSI.2009.2016726},
  doi          = {10.1109/TVLSI.2009.2016726},
  timestamp    = {Wed, 11 Mar 2020 18:18:38 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/KaoWLCCH09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}