BibTeX record journals/iet-cds/DokaniaI15

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@article{DBLP:journals/iet-cds/DokaniaI15,
  author       = {Vishesh Dokania and
                  Aminul Islam},
  title        = {Circuit-level design technique to mitigate impact of process, voltage
                  and temperature variations in complementary metal-oxide semiconductor
                  full adder cells},
  journal      = {{IET} Circuits Devices Syst.},
  volume       = {9},
  number       = {3},
  pages        = {204--212},
  year         = {2015},
  url          = {https://doi.org/10.1049/iet-cds.2014.0167},
  doi          = {10.1049/IET-CDS.2014.0167},
  timestamp    = {Wed, 27 Jan 2021 08:31:41 +0100},
  biburl       = {https://dblp.org/rec/journals/iet-cds/DokaniaI15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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