BibTeX record journals/ieicet/KohiraT08

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@article{DBLP:journals/ieicet/KohiraT08,
  author       = {Yukihide Kohira and
                  Atsushi Takahashi},
  title        = {A Fast Gate-Level Register Relocation Method for Circuit Size Reduction
                  in General-Synchronous Framework},
  journal      = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
  volume       = {91-A},
  number       = {10},
  pages        = {3030--3037},
  year         = {2008},
  url          = {https://doi.org/10.1093/ietfec/e91-a.10.3030},
  doi          = {10.1093/IETFEC/E91-A.10.3030},
  timestamp    = {Mon, 01 May 2023 13:02:17 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/KohiraT08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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