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BibTeX record conf/iscas/ChangLG05
@inproceedings{DBLP:conf/iscas/ChangLG05, author = {Hsiu{-}Cheng Chang and Chien{-}Chang Lin and Jiun{-}In Guo}, title = {A novel low-cost high-performance {VLSI} architecture for {MPEG-4} {AVC/H.264} {CAVLC} decoding}, booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26 May 2005, Kobe, Japan}, pages = {6110--6113}, publisher = {{IEEE}}, year = {2005}, url = {https://doi.org/10.1109/ISCAS.2005.1466034}, doi = {10.1109/ISCAS.2005.1466034}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/ChangLG05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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