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Mónico Linares Aranda
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2020 – today
- 2024
- [j6]Carlos Alfredo Pelcastre Ortega, Mónico Linares Aranda:
Hourglass transistor: An alternative and improved MOS structure robust to total ionization dose radiation. Microelectron. J. 152: 106391 (2024) - 2023
- [c27]Carlos Alfredo Pelcastre Ortega, Mónico Linares Aranda:
Hourglass and Semi-Hourglass layout techniques to improve radiation hardening of NMOS devices. CCE 2023: 1-4 - 2021
- [j5]Carlos Alberto Sanabria Diaz, Mónico Linares Aranda, Francisco Javier de la Hidalga Wade, Luis Hernández-Martínez:
Degradation performance analysis and operation optimization of rotary-traveling wave oscillators for RF-CMOS applications. Microelectron. J. 110: 105017 (2021) - [c26]Carlos Alberto Sanabria Diaz, Mónico Linares Aranda, Rogelio Manuel Higuera Gonzalez:
Analysis of On-Silicon-Vias for an Advanced RF-CMOS Process: Experimental Characterization and Modeling. CCE 2021: 1-4 - 2020
- [j4]Carlos Alberto Sanabria Diaz, Mónico Linares Aranda, Reydezel Torres-Torres, Alejandro Díaz-Sánchez:
Characterization and modeling of on-chip via stacks for RF-CMOS applications. IEICE Electron. Express 17(4): 20190735 (2020) - [c25]Carlos Alberto Sanabria Diaz, Mónico Linares Aranda, Rogelio Manuel Higuera Gonzalez, Javier de la Hidalga Wade:
Impact and Modeling of Möbius Connection in the Rotary Traveling Wave Oscillator Performance. LASCAS 2020: 1-4
2010 – 2019
- 2019
- [c24]Carlos Alberto Sanabria Diaz, Mónico Linares Aranda:
Electromagnetic analysis of via arrays for different RF-CMOS technological nodes. CCE 2019: 1-6 - 2018
- [j3]Mónico Linares Aranda, Oscar González-Díaz, D. M. Cortes-Hernandez, Reydezel Torres-Torres:
Semiempirical Model for IC Interconnects Considering the Coupling Between the Signal Trace and the Ground Plane. Circuits Syst. Signal Process. 37(9): 3888-3902 (2018) - [c23]Carlos Alberto Sanabria Diaz, Mónico Linares Aranda:
An analysis of on-silicon-via stacks in RF-CMOS processes. LASCAS 2018: 1-4 - 2017
- [c22]Carlos Ramón Báez Álvarez, Wilfrido Calleja Arriaga, Mónico Linares Aranda, Alfonso Torres-Jácome:
Anisotropic silicon etch to house CMOS compatible MEMS microstructures without planarization techniques. CCE 2017: 1-4 - [c21]Rogelio Manuel Higuera Gonzalez, Mónico Linares Aranda, Luis Hernández-Martínez, Carlos Alberto Sanabria Diaz:
Topology and discontinuities effect on CMOS rotary traveling wave oscillators. CCE 2017: 1-5 - [c20]Carlos Alberto Sanabria Diaz, Rogelio Manuel Higuera Gonzalez, Mónico Linares Aranda:
A simple model of inter-metallic connections (vias) in CMOS resonant rotary traveling wave oscillator (RTWO). CCE 2017: 1-5 - 2016
- [c19]Carlos Ramón Báez Álvarez, Mónico Linares Aranda, Alfonso Torres-Jácome, Wilfrido Calleja Arriaga, Javier de la Hidalga Wade:
A set of test structures for the development of a CMOS-MEMS technology. CCE 2016: 1-6 - [c18]Carlos Ramón Báez Álvarez, Mónico Linares Aranda, Alfonso Torres-Jácome, Wilfrido Calleja Arriaga:
Test structures for residual stress monitoring in the integrated CMOS-MEMS process development. SMACD 2016: 1-4 - 2014
- [c17]Javier Osorio Figueroa, Mónico Linares Aranda:
Analysis of the impact of vias on resonant rotary traveling wave oscillators. CCE 2014: 1-5 - [c16]Javier Osorio Figueroa, Mónico Linares Aranda:
Study of on-chip vias of resonant rotary traveling wave oscillators. VLSI-SoC 2014: 157-158 - 2013
- [c15]Carlos Ramón Báez Álvarez, Mónico Linares Aranda, Wilfrido Calleja Arriaga, Joel Molina Reyes:
Effect of changing the material and device's properties on the performance of polysilicon-based MicroActuators. CCE 2013: 415-420 - 2011
- [j2]Mónico Linares Aranda, Mariano Aguirre-Hernandez:
New High-Performance Full Adders Using an Alternative Logic Structure. Computación y Sistemas 14(3) (2011) - [j1]Mariano Aguirre-Hernandez, Mónico Linares Aranda:
CMOS Full-Adders for Energy-Efficient Arithmetic Applications. IEEE Trans. Very Large Scale Integr. Syst. 19(4): 718-721 (2011) - [c14]Mónico Linares Aranda, Ramón Báez Álvarez, Oscar González-Díaz, Wilfrido Calleja Arriaga:
An experimental comparison of expanded voltage controlled oscillators for system's synchronization. CCE 2011: 1-6 - 2010
- [c13]Oscar González-Díaz, Mónico Linares Aranda, Reydezel Torres-Torres:
Transmission line characterization for high frequency synchronization systems design. CONIELECOMP 2010: 43-47 - [c12]Mónico Linares Aranda, Ramón Báez, Oscar González-Díaz:
Hybrid adders for high-speed arithmetic circuits: A comparison. CCE 2010: 546-549
2000 – 2009
- 2008
- [c11]Daniel Decle Colin, Alejandro Díaz-Sánchez, Mónico Linares Aranda:
Design of 2 Stages Ring Oscillators Applying Local Networks of Feedback. CONIELECOMP 2008: 144-147 - [c10]Manuel Salim Maza, Oscar González-Díaz, Mónico Linares Aranda:
On-chip clock network using interconnected and coupled ring oscillators. ICECS 2008: 518-521 - 2005
- [c9]Mariano Aguirre, Mónico Linares Aranda:
An alternative logic approach to implement high-speed low-power full adder cells. SBCCI 2005: 166-171 - 2004
- [c8]Manuel Salim Maza, Mónico Linares Aranda:
Analysis and verification of interconnected rings as clock distribution networks. ACM Great Lakes Symposium on VLSI 2004: 312-315 - [c7]Fernando Mendoza-Hernandez, Mónico Linares Aranda, Víctor H. Champac Vilela:
An improved technique to increase noise-tolerance in dynamic digital circuits. ISCAS (2) 2004: 489-492 - [c6]Fernando Mendoza-Hernandez, Mónico Linares Aranda, Víctor H. Champac Vilela:
The noise immunity of dynamic digital circuits with technology scaling. ISCAS (2) 2004: 493-496 - [c5]Daniel Pacheco Bautista, Mónico Linares Aranda:
A low power and high speed CMOS Voltage-Controlled Ring Oscillator. ISCAS (4) 2004: 752-755 - [c4]Alejandro Martínez-Ramírez, Alejandro Díaz-Sánchez, Mónico Linares Aranda, Javier Vega-Pineda:
An architecture for fractal image compression using quad-tree multiresolution. ISCAS (2) 2004: 897-900 - 2003
- [c3]Manuel Salim Maza, Mónico Linares Aranda:
Interconnected rings and oscillators as gigahertz clock distribution nets. ACM Great Lakes Symposium on VLSI 2003: 41-44 - 2002
- [c2]Fernando Mendoza-Hernandez, Mónico Linares Aranda, Víctor H. Champac, Alejandro Díaz-Sánchez:
A new technique for noise-tolerant pipelined dynamic digital circuits. ISCAS (4) 2002: 185-188 - 2001
- [c1]Manuel Salim Maza, Mónico Linares Aranda:
Analysis of clock distribution networks in the presence of crosstalk and groundbounce. ICECS 2001: 773-776
Coauthor Index
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last updated on 2024-10-07 22:09 CEST by the dblp team
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