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2010 – 2019
- 2013
[c14]Ben Kelly, William B. Gardner, Shorin Kyo:
AutoPilot: message passing parallel programming for a cache incoherent embedded manycore processor. MES 2013: 62-65- 2012
- [c13]Hanno Lieske, Shorin Kyo, Shouhei Nomoto, Sunao Torii, Yuki Kobayashi, Yasuyuki Ninomiya, Shin'ichiro Okazaki:
Efficient data transfer operations for a SIMD processor array system. ICASSP 2012: 1625-1628 - 2011
- [j9]Shao-Yi Chien
, Shorin Kyo, Tsung-Han Tsai:
Guest Editorial: Special Issue on Computing Architectures for Real-Time Video/Image Analysis. J. Signal Process. Syst. 62(1): 1-3 (2011) - [j8]Shorin Kyo, Shin'ichiro Okazaki:
IMAPCAR: A 100 GOPS In-Vehicle Vision Processor Based on 128 Ring Connected Four-Way VLIW Processing Elements. J. Signal Process. Syst. 62(1): 5-16 (2011) - [c12]Shouhei Nomoto, Shorin Kyo, Shin'ichiro Okazaki:
A dynamic SIMD/MIMD mode switching processor for embedded real-time image recognition systems. A-SSCC 2011: 17-20 - 2010
- [j7]Shouhei Nomoto, Shorin Kyo, Shin'ichiro Okazaki:
Performance Evaluation of a Dynamically Switchable SIMD/MIMD Processor by Using an Image Recognition Application. Inf. Media Technol. 5(2): 366-375 (2010) - [j6]Shouhei Nomoto, Shorin Kyo, Shin'ichiro Okazaki:
Performance Evaluation of a Dynamically Switchable SIMD/MIMD Processor by Using an Image Recognition Application. IPSJ Trans. Syst. LSI Des. Methodol. 3: 47-56 (2010)
2000 – 2009
- 2009
- [c11]Shorin Kyo, Shouhei Nomoto, Takuya Koga, Hanno Lieske, Shin'ichiro Okazaki:
IMAPCAR2: A dynamic SIMD/MIMD mode switching processor for embedded systems. Hot Chips Symposium 2009: 1-33 - [c10]Shorin Kyo, Shouhei Nomoto, Shin'ichiro Okazaki:
Mapping schemes of image recognition tasks onto highly parallel SIMD/MIMD processors. ICDSC 2009: 1-6 - 2008
- [j5]Kazuyuki Sakurai, Shorin Kyo, Shin'ichiro Okazaki:
Overtaking Vehicle Detection Method and Its Implementation Using IMAPCAR Highly Parallel Image Processor. IEICE Trans. Inf. Syst. 91-D(7): 1899-1905 (2008) - [c9]Shorin Kyo, Shin'ichiro Okazaki:
In-vehicle vision processors for driver assistance systems. ASP-DAC 2008: 383-388 - 2007
- [j4]Ichiro Kuroda, Shorin Kyo:
Media Processing LSI Architectures for Automotives - Challenges and Future Trends - . IEICE Trans. Electron. 90-C(10): 1850-1857 (2007) - [j3]Shorin Kyo, Shin'ichiro Okazaki, Tamio Arai:
An Integrated Memory Array Processor for Embedded Image Recognition Systems. IEEE Trans. Computers 56(5): 622-634 (2007) - [c8]Shorin Kyo, Takuya Koga, Hanno Lieske, Shouhei Nomoto, Shin'ichiro Okazaki:
A low-cost mixed-mode parallel processor architecture for embedded systems. ICS 2007: 253-262 - [c7]Kazuyuki Sakurai, Shorin Kyo, Shin'ichiro Okazaki:
Overtaking Vehicle Detection Method and Its Implementation Using IMAPCAR Highly Parallel Image Processor. MVA 2007: 579-582 - 2005
- [c6]Shorin Kyo, Shin'ichiro Okazaki, Tamio Arai:
An Integrated Memory Array Processor Architecture for Embedded Image Recognition Systems. ISCA 2005: 134-145 - 2004
- [j2]Shorin Kyo, Takuya Koga, Shin'ichiro Okazaki, Ichiro Kuroda:
A 51.2 GOPS Programmable Video Recognition Processor for Vision-Based Intelligent Cruise Control Applications. IEICE Trans. Inf. Syst. 87-D(1): 136-145 (2004) - 2003
- [j1]Shorin Kyo, Takuya Koga, Shin'ichiro Okazaki, Ichiro Kuroda:
A 51.2-GOPS scalable video recognition processor for intelligent cruise control based on a linear array of 128 four-way VLIW processing elements. IEEE J. Solid State Circuits 38(11): 1992-2000 (2003) - 2002
- [c5]Shorin Kyo:
A 51.2GOPS Programmable Video Recognition Processor for Vision Based Intelligent Cruise Control Applications. MVA 2002: 632-635 - 2001
- [c4]Shorin Kyo, Takuya Koga, Shin'ichiro Okazaki:
IMAP-CE: a 51.2 GOPS video rate image processor with 128 VLIW processing elements. ICIP (3) 2001: 294-297
1990 – 1999
- 1996
- [c3]Sholin Kyo, Kan Sato:
Efficient Implementation of Image Processing Algorithms on Linear Processor Arrays Using the Data Parallel Language IDC. MVA 1996: 160-165 - 1993
- [c2]Sholin Kyo, Shin'ichiro Okazaki, Masanori Mizoguchi:
Dataflow Graph Optimization for Dataflow Architectures - A Dataflow Optimizing Compiler. ICPP (2) 1993: 236-240 - [c1]Sholin Kyo, Satoshi Sekiguchi, Mitsuhisa Sato:
Data Stream Control Optimization in Dataflow Architectures. International Conference on Supercomputing 1993: 37-46
Coauthor Index
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