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Jongpil Jung
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2010 – 2019
- 2016
- [j2]Seunghan Lee, Kyungsu Kang, Jongpil Jung, Chong-Min Kyung:
Hybrid L2 NUCA Design and Management Considering Data Access Latency, Energy Efficiency, and Storage Lifetime. IEEE Trans. Very Large Scale Integr. Syst. 24(10): 3118-3131 (2016) - 2014
- [c11]Jongpil Jung, Jinyeon Lim, Seunghan Lee, Jungeon Lee, Jinyoung Yang, Chong-Min Kyung:
A low-energy video event data recorder using dual image/video codec. AVSS 2014: 277-282 - [c10]Seunghan Lee, Kyungsu Kang, Jongpil Jung, Chong-Min Kyung:
Runtime 3-D stacked cache data management for energy minimization of 3-D chip-multiprocessors. ISQED 2014: 197-204 - 2013
- [c9]Jongpil Jung, Kyungsu Kang, Giovanni De Micheli, Chong-Min Kyung:
Runtime 3-D stacked cache management for chip-multiprocessors. ISQED 2013: 68-72 - [c8]Jongbum Park, Jongpil Jung, Kang Yi, Chong-Min Kyung:
Static energy minimization of 3D stacked L2 cache with selective cache compression. VLSI-SoC 2013: 228-233 - 2012
- [c7]Giwon Kim, Jungsoo Kim, Jongpil Jung, Chong-Min Kyung:
Energy-Aware Operation of Black Box Surveillance Cameras under Event Uncertainty and Memory Constraint. ICME 2012: 782-787 - [c6]Suji Lee, Jongpil Jung, Chong-Min Kyung:
Hybrid cache architecture replacing SRAM cache with future memory technology. ISCAS 2012: 2481-2484 - [c5]Woojin Yun, Jongpil Jung, Kyungsu Kang, Chong-Min Kyung:
Temperature-aware energy minimization of 3D-stacked L2 DRAM cache through DVFS. ISOCC 2012: 475-478 - [c4]Jongpil Jung, Kyungsu Kang, Jae-Jin Lee, Youngjun Yoon, Chong-Min Kyung:
Cost-effective TSV redundancy configuration. VLSI-SoC 2012: 263-266 - 2011
- [c3]Jongpil Jung, Kyungsu Kang, Chong-Min Kyung:
Design and management of 3D-stacked NUCA cache for chip multiprocessors. ACM Great Lakes Symposium on VLSI 2011: 91-96 - [c2]Kyungsu Kang, Jongpil Jung, Sungjoo Yoo, Chong-Min Kyung:
Maximizing throughput of temperature-constrained multi-core systems with 3D-stacked cache memory. ISQED 2011: 577-582 - 2010
- [j1]Jongpil Jung, Jaemoon Kim, Chong-Min Kyung:
A Dynamic Search Range Algorithm for Stabilized Reduction of Memory Traffic in Video Encoder. IEEE Trans. Circuits Syst. Video Technol. 20(7): 1041-1046 (2010) - [c1]Jongpil Jung, Seonpil Kim, Chong-Min Kyung:
Latency-aware Utility-based NUCA Cache Partitioning in 3D-stacked multi-processor systems. VLSI-SoC 2010: 125-130
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