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2010 – 2019
- 2018
[c22]Weiyi Sun, Hanqing Zeng, Yi-Hua Edward Yang, Viktor K. Prasanna:
Throughput-Optimized Frequency Domain CNN with Fixed-Point Quantization on FPGA. ReConFig 2018: 1-8- 2016
- [c21]Shreyas G. Singapura, Yi-Hua E. Yang, Anand V. Panangadan, Tamás Németh, Peter Ng, Viktor K. Prasanna:
FPGA-Based Acceleration of Pattern Matching in YARA. ARC 2016: 320-327 - 2014
- [c20]Andrea Sanny, Yi-Hua E. Yang, Viktor K. Prasanna:
Energy-efficient histogram equalization on FPGA. HPEC 2014: 1-6 - [c19]Andrea Sanny, Yi-Hua E. Yang, Viktor K. Prasanna:
Energy-efficient histogram on FPGA. ReConFig 2014: 1-6 - 2013
- [j3]Yi-Hua E. Yang, Viktor K. Prasanna:
Robust and Scalable String Pattern Matching for Deep Packet Inspection on Multicore Processors. IEEE Trans. Parallel Distributed Syst. 24(11): 2283-2292 (2013) - [c18]Yi-Hua E. Yang, Yun Qu, Swapnil Haria, Viktor K. Prasanna:
Architecture and performance models for scalable IP lookup engines on FPGA. HPSR 2013: 156-163 - 2012
- [j2]Yi-Hua E. Yang, Viktor K. Prasanna:
High-Performance and Compact Architecture for Regular Expression Matching on FPGA. IEEE Trans. Computers 61(7): 1013-1025 (2012) - [c17]Yi-Hua E. Yang, Oguzhan Erdem, Viktor K. Prasanna:
Scalable architecture for 135 GBPS IPv6 lookup on FPGA (abstract only). FPGA 2012: 272 - [c16]Yun Qu, Yi-Hua E. Yang, Viktor K. Prasanna:
Large-scale multi-flow regular expression matching on FPGA. HPSR 2012: 70-75 - [c15]Da Tong, Yi-Hua E. Yang, Viktor K. Prasanna:
A memory efficient IPv6 lookup engine on FPGA. ReConFig 2012: 1-6 - [r1]Yi-Hua E. Yang, Viktor K. Prasanna:
Large-Scale Regular Expression Matching on FPGA. Handbook of Finite State Based Models and Applications 2012: 19-43 - 2011
- [c14]Yi-Hua E. Yang, Viktor K. Prasanna:
Optimizing Regular Expression Matching with SR-NFA on Multi-Core Systems. PACT 2011: 424-433 - [c13]Yi-Hua Edward Yang, Oguzhan Erdem, Viktor K. Prasanna:
High Performance IP Lookup on FPGA with Combined Length-Infix Pipelined Search. FCCM 2011: 77-80 - [c12]Yi-Hua E. Yang, Viktor K. Prasanna:
Space-time tradeoff in regular expression matching with semi-deterministic finite automata. INFOCOM 2011: 1853-1861 - [c11]Yun Qu, Yi-Hua E. Yang, Viktor K. Prasanna:
Multi-stream Regular Expression Matching on FPGA. ReConFig 2011: 86-91 - 2010
- [c10]Yi-Hua E. Yang, Viktor K. Prasanna:
High throughput and large capacity pipelined dynamic search tree on FPGA. FPGA 2010: 83-92 - [c9]Hoang Le, Yi-Hua E. Yang, Viktor K. Prasanna:
Memory efficient string matching: a modular approach on FPGAs (abstract only). FPGA 2010: 285 - [c8]Thilan Ganegedara, Yi-Hua E. Yang, Viktor K. Prasanna:
Automation Framework for Large-Scale Regular Expression Matching on FPGA. FPL 2010: 50-55 - [c7]Yi-Hua Edward Yang, Hoang Le, Viktor K. Prasanna:
High Performance Dictionary-Based String Matching for Deep Packet Inspection. INFOCOM 2010: 86-90 - [c6]Weirong Jiang
, Yi-Hua Edward Yang, Viktor K. Prasanna:
Scalable multi-pipeline architecture for high performance multi-pattern string matching. IPDPS 2010: 1-12 - [c5]Yi-Hua E. Yang, Viktor K. Prasanna, Chenqian Jiang:
Head-body partitioned string matching for Deep Packet Inspection with scalable and attack-resilient performance. IPDPS 2010: 1-11
2000 – 2009
- 2009
- [j1]Yi-Hua Edward Yang, Viktor K. Prasanna:
Software Toolchain for Large-Scale RE-NFA Construction on FPGA. Int. J. Reconfigurable Comput. 2009: 301512:1-301512:10 (2009) - [c4]Yi-Hua Edward Yang, Viktor K. Prasanna:
Memory-Efficient Pipelined Architecture for Large-Scale String Matching. FCCM 2009: 104-111 - 2008
- [c3]Yi-Hua E. Yang, Weirong Jiang, Viktor K. Prasanna:
Compact architecture for high-throughput regular expression matching on FPGA. ANCS 2008: 30-39 - [c2]Yi-Hua E. Yang, Joseph D. Touch:
Protocol Family for Optimal and Deterministic Symmetric Key Assignment. ICN 2008: 207-212 - [c1]Yi-Hua E. Yang, Viktor K. Prasanna:
Automatic Construction of Large-Scale Regular Expression Matching Engines on FPGA. ReConFig 2008: 73-78
Coauthor Index
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