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Ajay Singh 0002
Person information
- affiliation: University of Waterloo, ON, Canada
Other persons with the same name
- Ajay Singh — disambiguation page
- Ajay Singh 0001
— Indian Institute of Technology Jammu Jagti, Jammu and Kashmir, India
- Ajay Singh 0003 — Uttaranchal University, Dehradun, India
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2020 – today
- 2024
- [j1]Ajay Singh
, Trevor Alexander Brown
, Ali José Mashtizadeh
:
Simple, Fast and Widely Applicable Concurrent Memory Reclamation via Neutralization. IEEE Trans. Parallel Distributed Syst. 35(2): 203-220 (2024) - [c4]Daewoo Kim
, Trevor Brown
, Ajay Singh
:
Are Your Epochs Too Epic? Batch Free Can Be Harmful. PPoPP 2024: 30-41 - [i5]Daewoo Kim, Trevor Brown, Ajay Singh
:
Are Your Epochs Too Epic? Batch Free Can Be Harmful. CoRR abs/2401.11347 (2024) - 2023
- [c3]Ajay Singh
, Trevor Brown, Michael Spear:
Efficient Hardware Primitives for Immediate Memory Reclamation in Optimistic Data Structures. IPDPS 2023: 112-122 - [i4]Ajay Singh, Trevor Brown, Michael Spear:
Efficient Hardware Primitives for Immediate Memory Reclamation in Optimistic Data Structures. CoRR abs/2302.12958 (2023) - 2021
- [c2]Ajay Singh
, Trevor Brown, Ali José Mashtizadeh:
NBR: neutralization based reclamation. PPoPP 2021: 175-190 - 2020
- [i3]Ajay Singh, Trevor Brown, Ali José Mashtizadeh:
NBR: Neutralization Based Reclamation. CoRR abs/2012.14542 (2020)
2010 – 2019
- 2018
- [c1]Sathya Peri, Ajay Singh
, Archit Somani:
Efficient Means of Achieving Composability Using Object Based Semantics in Transactional Memory Systems. NETYS 2018: 157-174 - 2017
- [i2]Ajay Singh, Sathya Peri, G. Monika, Anila Kumari:
Performance Comparison of Various STM Concurrency Control Protocols Using Synchrobench. CoRR abs/1707.08357 (2017) - [i1]Sathya Peri, Ajay Singh, Archit Somani:
Efficient means of Achieving Composability using Transactional Memory. CoRR abs/1709.00681 (2017)
Coauthor Index
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last updated on 2024-08-03 21:16 CEST by the dblp team
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