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ORCIDVincent Mirian
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2010 – 2019
- 2017
[c10]Vincent Mirian, Paul Chow:
Enabling FPGAs as a True Device in the OpenCL Standard: Bridging the Gap for FPGAs. IWOCL 2017: 5:1-5:12- 2016
- [c9]Vincent Mirian, Paul Chow:
Extracting Designs of Secure IPs Using FPGA CAD Tools. ACM Great Lakes Symposium on VLSI 2016: 293-298 - 2015
- [c8]Vincent Mirian, Paul Chow:
Exploring pipe implementations using an OpenCL framework for FPGAs. FPT 2015: 112-119 - [c7]Vincent Mirian, Paul Chow:
Evaluating shared virtual memory in an OpenCL framework for embedded systems on FPGAs. ReConFig 2015: 1-8 - [c6]Vincent Mirian, Paul Chow:
UT-OCL: an OpenCL framework for embedded systems using xilinx FPGAs. ReConFig 2015: 1-6 - 2014
- [c5]Vincent Mirian, Paul Chow:
Using an OpenCL framework to evaluate interconnect implementations on FPGAs. FPL 2014: 1-4 - 2012
- [c4]Vincent Mirian, Paul Chow:
FCache: a system for cache coherent processing on FPGAs. FPGA 2012: 233-236 - [c3]Vincent Mirian, Paul Chow:
Managing mutex variables in a cache-coherent shared-memory system for FPGAs. FPT 2012: 43-46 - [c2]Vincent Mirian, Paul Chow:
An implementation of a directory protocol for a cache coherent system on FPGAs. ReConFig 2012: 1-6
2000 – 2009
- 2009
- [c1]Jiang Jiang, Vincent Mirian, Kam Pui Tang, Paul Chow, Zuocheng Xing:
Matrix Multiplication Based on Scalable Macro-Pipelined FPGA Accelerator Architecture. ReConFig 2009: 48-53
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