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Jean-Jacques Hajjar
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2020 – today
- 2024
- [c6]Shudong Huang, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Jean-Jacques Hajjar, Elyse Rosenbaum:
Reduced RC Time Constant High Voltage Tolerant Supply Clamp for ESD Protection in 16nm FinFET Technology. IRPS 2024: 1-7 - 2023
- [c5]Shudong Huang, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Jean-Jacques Hajjar, Elyse Rosenbaum:
Optimization of SCR for High-Speed Digital and RF Applications in 45-nm SOI CMOS Technology. IRPS 2023: 1-7 - 2022
- [c4]Shudong Huang, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Jean-Jacques Hajjar, Elyse Rosenbaum:
A High Voltage Tolerant Supply Clamp for ESD Protection in a 45-nm SOI Technology. IRPS 2022: 5
2010 – 2019
- 2019
- [c3]Hang Li, Kalpathy B. Sundaram
, Yuanzhong Paul Zhou, Javier A. Salcedo, Jean-Jacques Hajjar:
Characterization and Modeling of the Transient Safe Operating Area in LDMOS Transistors. IRPS 2019: 1-5 - 2017
- [j6]Aihua Dong, Javier A. Salcedo, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Sirui Luo, Jean-Jacques Hajjar, Juin J. Liou:
ESD protection structure with reduced capacitance and overshoot voltage for high speed interface applications. Microelectron. Reliab. 79: 201-205 (2017) - 2015
- [j5]Meng Miao, Yuanzhong Paul Zhou, Javier A. Salcedo, Jean-Jacques Hajjar, Juin J. Liou:
Compact failure modeling for devices subject to electrostatic discharge stresses - A review pertinent to CMOS reliability simulation. Microelectron. Reliab. 55(1): 15-23 (2015) - [j4]Yunfeng Xi, Javier A. Salcedo, Yuanzhong Paul Zhou, Juin J. Liou, Jean-Jacques Hajjar:
Design and characterization of ESD solutions with EMC robustness for automotive applications. Microelectron. Reliab. 55(11): 2236-2246 (2015) - [c2]Srivatsan Parthasarathy, Javier A. Salcedo, Sandro Herrera, Jean-Jacques Hajjar:
ESD protection clamp with active feedback and mis-trigger immunity in 28nm CMOS process. IRPS 2015: 3 - 2014
- [j3]Qiang Cui, Srivatsan Parthasarathy, Javier A. Salcedo, Juin J. Liou, Jean-Jacques Hajjar, Yuanzhong Paul Zhou:
Design optimization of SiGe BiCMOS Silicon Controlled Rectifier for Charged Device Model (CDM) protection applications. Microelectron. Reliab. 54(1): 57-63 (2014) - 2013
- [j2]Yuanzhong Paul Zhou, David Ellis, Jean-Jacques Hajjar, Andrew Olney, Juin J. Liou:
vfTLP-VTH: A new method for quantifying the effectiveness of ESD protection for the CDM classification test. Microelectron. Reliab. 53(2): 196-204 (2013) - [c1]Yuanzhong Paul Zhou, Alan W. Righter, Jean-Jacques Hajjar:
Investigation on effectiveness of series gate resistor in CDM ESD protection designs. ASICON 2013: 1-4 - 2012
- [j1]Yuanzhong Paul Zhou, Javier A. Salcedo, Jean-Jacques Hajjar:
Modeling of high voltage devices for ESD event simulation in SPICE. Microelectron. J. 43(5): 305-311 (2012)
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