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Journal Articles
- 2005
[j5]Sandip Kundu, Sujit T. Zachariah, Yi-Shing Chang, Chandra Tirumurti:
On modeling crosstalk faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(12): 1909-1915 (2005)- 2004
- [j4]Sujit T. Zachariah, Sreejit Chakravarty:
Extraction of two-node bridges from large industrial circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(3): 433-439 (2004) - 2003
- [j3]Sujit T. Zachariah, Sreejit Chakravarty:
Algorithm to extract two-node bridges. IEEE Trans. Very Large Scale Integr. Syst. 11(4): 741-744 (2003) - 2001
- [j2]Sandip Kundu, Sujit T. Zachariah, Sanjay Sengupta, Rajesh Galivanche:
Test Challenges in Nanometer Technologies. J. Electron. Test. 17(3-4): 209-218 (2001) - 2000
- [j1]Sreejit Chakravarty, Sujit T. Zachariah:
STBM: a fast algorithm to simulate IDDQ tests forleakage faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(5): 568-576 (2000)
Conference and Workshop Papers
- 2006
- [c10]Debasis Mitra, Subhasis Bhattacharjee
, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Sujit T. Zachariah, Sandip Kundu:
Test Pattern Generation for Power Supply Droop Faults. VLSI Design 2006: 343-348 - 2005
- [c9]Eric N. Tran, Vamsee Krishna, Sujit T. Zachariah, Sreejit Chakravarty:
Logic proximity bridges. ITC 2005: 10 - 2004
- [c8]Susmita Sur-Kolay, Parthasarathi Dasgupta, Bhargab B. Bhattacharya, Sujit T. Zachariah:
Physical Design Trends and Layout-Based Fault Modeling. VLSI Design 2004: 6-8 - 2003
- [c7]Sujit T. Zachariah, Yi-Shing Chang, Sandip Kundu, Chandra Tirumurti:
On Modeling Cross-Talk Faults. DATE 2003: 10490-10495 - 2002
- [c6]Sreejit Chakravarty, Ankur Jain, Nandakumar Radhakrishnan, Eric W. Savage, Sujit T. Zachariah:
Experimental Evaluation of Scan Tests for Bridges. ITC 2002: 509-518 - [c5]Sreejit Chakravarty, Kambiz Komeyli, Eric W. Savage, Michael J. Carruthers, Bret T. Stastny, Sujit T. Zachariah:
Layout Analysis to Extract Open Nets Caused by Systematic Failure Mechanisms. VTS 2002: 367-372 - 2001
- [c4]Sujit T. Zachariah, Sreejit Chakravarty:
A Novel Algorithm for Multi-Node Bridge Analysis of Large VLSI Circuits. VLSI Design 2001: 333-338 - 2000
- [c3]Sujit T. Zachariah, Sreejit Chakravarty, Carl D. Roth:
A novel algorithm to extract two-node bridges. DAC 2000: 790-793 - [c2]Sujit T. Zachariah, Sreejit Chakravarty:
A scalable and efficient methodology to extract two node bridges from large industrial circuits. ITC 2000: 750-759 - 1999
- [c1]Sujit T. Zachariah, Sreejit Chakravarty:
A Comparative Study of Pseudo Stuck-At and Leakage Fault Model. VLSI Design 1999: 91-94
Coauthor Index
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