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Journal Articles
- 2012
[j2]Santanu Kundu, Soumya J.
, Santanu Chattopadhyay:
Design and evaluation of Mesh-of-Tree based Network-on-Chip using virtual channel router. Microprocess. Microsystems 36(6): 471-488 (2012)- 2008
- [j1]Santanu Kundu, Santanu Chattopadhyay:
Network-on-chip architecture design based on mesh-of-tree deterministic routing topology. Int. J. High Perform. Syst. Archit. 1(3): 163-182 (2008)
Conference and Workshop Papers
- 2024
- [c9]Sashank Nishad, Santanu Kundu, Nicolas Richaud, S. Mallikarjun, Manoranjan Prasad, Lennart Renker:
MLESD: Machine Learning Assisted Faster On-Chip ESD Convergence Strategy. VLSID 2024: 281-286 - [c8]Manoranjan Prasad, Santanu Kundu, Lennart Renker, Rakesh Ranjan:
Unlocking the Power of Machine Learning for Faster PCB Package and Board PDN Convergence. VLSID 2024: 287-292 - 2023
- [c7]Santanu Kundu, Chetan Suryakant Padharia, Ravi Sankar Kerla:
MLTDRC: Machine Learning Driven Faster Timing Design Rule Check Convergence. VLSID 2023: 181-186 - 2022
- [c6]Santanu Kundu, Manoranjan Prasad, Sashank Nishad, Sandeep Nachireddy, Harikrishnan K:
MLIR: Machine Learning based IR Drop Prediction on ECO Revised Design for Faster Convergence. VLSID 2022: 68-73 - 2016
- [c5]Tuhin Subhra Chakraborty, Santanu Kundu, Deepak Agrawal, Sanjay Tanaji Shinde, Jacob Mathews, Rekha K. James:
Leakage Power Minimization in Deep Sub-Micron Technology by Exploiting Positive Slacks of Dependent Paths. ACM Great Lakes Symposium on VLSI 2016: 365-368 - 2011
- [c4]Santanu Kundu, Santanu Chattopadhyay:
Design and Evaluation of Mesh-of-Tree Based Network-on-Chip for Two- and Three-Dimensional Integrated Circuits. ISVLSI 2011: 357-358 - 2009
- [c3]Santanu Kundu, Kanchan Manna, Shobhit Gupta, Kundan Kumar, Ritesh Parikh, Santanu Chattopadhyay:
A Comparative Performance Evaluation of Network-on-Chip Architectures under Self-Similar Traffic. ARTCom 2009: 414-418 - 2008
- [c2]Santanu Kundu, Santanu Chattopadhyay:
Mesh-of-tree deterministic routing for network-on-chip architecture. ACM Great Lakes Symposium on VLSI 2008: 343-346 - [c1]Santanu Kundu, Radha Purnima Dasari, Santanu Chattopadhyay, Kanchan Manna:
Mesh-of-Tree Based Scalable Network-on-Chip Architecture. ICIIS 2008: 1-6
Coauthor Index
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