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Raymond P. Voith

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Journal Articles

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1977
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Raymond P. Voith:
ULM Implicants for Minimization of Universal Logic Module Circuits. IEEE Trans. Computers 26(5): 417-424 (1977)
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Raymond P. Voith:
Minimum Universal Logic Module Sequential Circuits with Decoders. IEEE Trans. Computers 26(10): 1032-1035 (1977)
1974
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Raymond P. Voith:
B 74-32 Digital Design. IEEE Trans. Computers 23(5): 558-559 (1974)

Conference and Workshop Papers

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1994
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Raymond P. Voith:
The PowerPC 603 C++ Verilog Interface Model. COMPCON 1994: 337-340
1993
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Sankaran Karthik, Jacob A. Abraham, Raymond P. Voith:
Optimizations for Behavioral/RTL Simulation. VLSI Design 1993: 311-316

Coauthor Index

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